| 摘要 |
PROBLEM TO BE SOLVED: To relax restriction of wiring between an SDRAM and a memory controller without providing a circuit in consideration of glitch noise of a data strobe signal. SOLUTION: There is provided a memory control device being characterized in that data is taken in a memory system holding a DDR-SDRAM as a memory means by a clock different from DQS being the data strobe signal. The memory control device is provided with a delay circuit 601 connected to a circuit 600 masking the clock and an output of its mask circuit. Further, the device is provided with a flip-flop group 602 storing a delay time for each memory chip, determines a memory chip accessed for each read-access, selects a delay value of the delay value stored flip-flop group 602 by a delay value selection control circuit 604 in time with capturing data, and delays an output signal of the mask circuit 600 by the delay circuit 601. COPYRIGHT: (C)2008,JPO&INPIT
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