| 摘要 |
A semiconductor process and apparatus use a predetermined sequence of patterning and etching steps to etch a gate stack ( 62 ) formed over a substrate ( 11 ) and a first spacer structure ( 42 ), thereby forming etched gate structures ( 72, 74 ) that are physically separated from one another but that control a substrate channel ( 71 ) subsequently defined in the substrate ( 11 ) by source/drain regions ( 82, 102, 84, 104 ) that are implanted around the etched gate structures ( 72, 74 ). Depending on how the first spacer structure ( 42 ) is positioned and configured, the channel ( 71 ) may be controlled to provide either a logical AND gate ( 100 ) or logical OR gate ( 200 ) functionality.
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