发明名称 VERTEX PROCESSING APPARATUS AND METHOD HAVING MULTI-STAGE PIPELINE STRUCTURE
摘要 A device and a method for processing a vertex in a multi-stage pipeline structure are provided to reduce the maximum delay between respective execution codes to three stages by using an ALU(Arithmetic Logic Unit) of the multi-stage pipeline structure sequentially connecting operators. A first resister(310a) stores data for processing the vertex and a second register stores an operating result. An instruction fetch unit(300) sequentially fetches an instruction including an OP(Operation) code and more than one operand. A decoding unit(320) decodes the instruction and reads the needed data from the first register according to the operand. The ALU(330) comprises a plurality of operators, and sequentially processes/outputs the data through more than one operator according to a type of the OP code. A write back unit(340) stores an operation result of the prior OP code to a second register(310b) and temporally stores other results in the inside to process other result in the next stage.
申请公布号 KR100788500(B1) 申请公布日期 2007.12.24
申请号 KR20060066586 申请日期 2006.07.14
申请人 MTEK VISION CO., LTD. 发明人 PARK, KI HYUN;JEONG, HYEONG KI;LEE, KWANG YEOB
分类号 G06F9/38;G06F9/00 主分类号 G06F9/38
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