CMOS INTEGRATED PROCESS FOR FABRICATING MONOCRYSTALLINE SILICON

摘要

The invention relates to a process for fabricating a monocrystalline Si-micromechanical element integrated with a CMOS circuit element within the CMOS technology, wherein a domain of second conducting property is formed within a substrate of first conducting property, here the second conducting property is reverse with respect to the first conducting property, then simultaneously with or immediately after this a domain of monocrystalline Si is formed within the substrate for fabricating a micromechanical element. After this, a CMOS circuit element is fabricated within the substrate through the known steps of CMOS technology and then the circuit element, as well as a portion of said domain for fabricating the micromechanical element that will carry the micromechanical element after its fabrication are covered with a protecting layer. Then by starting a front-side isotropic porous Si-etching from the exposed surface of said domain for fabricating the micromechanical element and by continuing the etching until said portion that will carry the micromechanical element after its fabrication becomes at least in its full extent underetched, a porous Si sacrificial layer is created which at least partially encloses said portion that will carry the micromechanical element after its fabrication. As a next step, the exposed surface of said porous Si sacrificial layer is passivated by applying a metallic thin film thereon and metallic contact pieces of the circuit element through the known steps of CMOS technology are formed. Finally, the metallic thin film that covers the exposed surface of the porous Si sacrificial layer is removed and the micromechanical element is formed by chemically dissolving said porous Si sacrificial layer.