摘要 |
In one embodiment, a system comprises a first circuit assembly (210) having a plurality of circuit traces (212, 214, 216, 218), a second circuit assembly (270) having a plurality of circuit traces (272, 274, 276, 278), a cable assembly (260) connecting the plurality of circuit traces (212, 214, 216, 218) on the first circuit assembly (210) to the plurality of circuit traces (272, 274, 276, 278) on the second circuit assembly (270), signal generating circuitry (240, 242, 246, 248) to generate signal values on one or more of the plurality of circuit traces (212, 214, 216, 218) in the first circuit assembly (210), and an operational logic module (166) to compare signal values on one or more of the plurality of circuit traces (272, 274, 276, 278) in the second circuit assembly (270) to an expected signal value. |
申请人 |
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.;BARNETTE, CHRISTOPHER M.;SCHUMACHER, RICHARD |
发明人 |
BARNETTE, CHRISTOPHER M.;SCHUMACHER, RICHARD |