发明名称 TECHNIQUES FOR DEVICE FABRICATION WITH SELF-ALIGNED ELECTRODES
摘要 This invention relates to the fabrication of electronic devices, such as thin-film transistors, in particular thin-film transistors in which patterning techniques are used for definition of electrode patterns that need to be accurately aligned with respect to underlying electrodes. The fabrication technique is applicable to various patterning techniques, such as laser ablation patterning or solution-based, direct-write printing techniques which are not capable of forming structures with a small linewidth, and/or that cannot be positioned very accurately with respect to previously desposited patterns. We thus describe self-aligned gate techniques which are applicable for both gate patterning by a subtractive technique, in particular selective laser ablation patterning, and gate patterning by an additive technique such as printing. The techniques facilitate the use of low-resolution gate patterning.
申请公布号 WO2007110671(A3) 申请公布日期 2007.12.21
申请号 WO2007GB50160 申请日期 2007.03.28
申请人 PLASTIC LOGIC LIMITED;CAMBRIDGE ENTERPRISE LIMITED;CAIN, PAUL, A.;NOH, YONG-YOUNG;SIRRINGHAUS, HENNING 发明人 CAIN, PAUL, A.;NOH, YONG-YOUNG;SIRRINGHAUS, HENNING
分类号 H01L51/10 主分类号 H01L51/10
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