发明名称 SUBSTRATE MOUNTING STRUCTURE FOR WAFER LEVEL CSP
摘要 <p><P>PROBLEM TO BE SOLVED: To prevent breakage of a wafer level CSP due to heat shrinkage of a resin during resin-sealing for a reinforcement purpose after mounting the wafer level CSP onto a substrate. <P>SOLUTION: A circuit pattern 11 and a pattern except the circuit pattern called an accessory pattern 12 that is used for an electrical inspection during manufacturing and alignment at the time of manufacturing are patterned on a silicon wafer 10 away from parts to be diced on the silicon wafer. An aluminum pad 13 and a polyimide layer 14 of an insulation protective film are provided on the circuit pattern 11 so as to mount solder balls 17 after applying wirings 15 by copper and executing sealing by a resin mold 16. After that, each of the wafer level CSPs 1 that are cut into each individual piece by a dicing blade is mounted on the substrate 2 while being turned back so as to apply a resin to all four sides of the wafer level CSP for strength improvement. The resin is cured after executing resin-sealing so as to allow a fillet of the resin 3 to be formed up to the upper part of each side face of the wafer level CSP 1. <P>COPYRIGHT: (C)2008,JPO&INPIT</p>
申请公布号 JP2007329261(A) 申请公布日期 2007.12.20
申请号 JP20060158648 申请日期 2006.06.07
申请人 NEC SAITAMA LTD 发明人 AKASAKA HIROAKI
分类号 H01L21/50;H01L21/301;H01L21/3205;H01L23/12;H01L23/29;H01L23/31;H01L23/52 主分类号 H01L21/50
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