| 摘要 |
The invention relates to a circuit configuration with a serial test interface (TIF) to control a test operation mode, a freely programmable digital processor (CPU), a housing (G) for the accommodation of a test interface (TIF) and the processor (CPU) with terminals or connectors (C 0, C 1 ) for data and/or signal exchange with external components and setups. At one of the terminals (C 1 ), a modulated supply voltage (VDD) can be received the transfer of data (d) and or a clock (T) by using at least two voltage levels (V 2, V 3 ) that can be controlled and which are different from a supply voltage level (V 1 ) that is designed to feed the circuitry with a supply operating voltage. Furthermore, the invention relates to a serial test operation method for such a circuit configuration.
|
