SEMICONDUCTOR INTEGRATED CIRCUIT

摘要

The voltage on the most sensitive noise sensing line that is thin and long inside in terms of layout and is near the power supply line or the ground line is captured by use of the system clock. A layout fixing logic constituted by a flip-flop is provided, and only when the voltage on the noise sensing line is changed due to noise or the like, first sensing data is outputted at low level from the layout fixing logic. Noise immunity characteristics can be improved by changing the circuit operation of the memory by the first sensing data.