发明名称 |
Improving Performance of a Processor Having a Defective Cache |
摘要 |
In one embodiment, a method for improving performance of a processor having a defective cache includes accessing first object code and generating second object code from the first object code. The generation of the second object code takes into account one or more locations of one or more defects in a cache on a processor such that one or more instructions in the second object code are written only to nondefective locations in the cache.
|
申请公布号 |
US2007294587(A1) |
申请公布日期 |
2007.12.20 |
申请号 |
US20060421365 |
申请日期 |
2006.05.31 |
申请人 |
ISHIHARA TORU;FALLAH FARZAN |
发明人 |
ISHIHARA TORU;FALLAH FARZAN |
分类号 |
G06F11/00 |
主分类号 |
G06F11/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|