发明名称 METHOD AND SYSTEM FOR OPTIMIZING INTRA-FIELD CRITICAL DIMENSION UNIFORMITY USING A SACRIFICIAL TWIN MASK
摘要 Disclosed is a method and a system for optimizing intra-field critical dimension of an integrated circuit. A first mask for an integrated circuit is provided comprising at least one device region. A second mask is provided by copying the first mask and a lithography operation is provided to the integrated circuit using the first and second masks, wherein the critical dimension of the integrated circuit is optimized using the second mask. The second mask comprises a plurality of sacrificial patterns, which may be a plurality of flat patterns or a plurality of grating patterns.
申请公布号 US2007292774(A1) 申请公布日期 2007.12.20
申请号 US20070763269 申请日期 2007.06.14
申请人 KE CHIH-MING;GAU TSAI-SHENG;YU SHINN-SHENG;HSIEH HUNG-CHANG 发明人 KE CHIH-MING;GAU TSAI-SHENG;YU SHINN-SHENG;HSIEH HUNG-CHANG
分类号 G03F1/00 主分类号 G03F1/00
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