发明名称 INFORMATION PROCESSING APPARATUS
摘要 <p><P>PROBLEM TO BE SOLVED: To reduce a power consumption by restraining a circuit from being needlessly operated in a period of time when data in a link-down state does not flow or when transmission/reception data in a link-up state does not exist. <P>SOLUTION: In this information processing apparatus, an Ethernet processing part reduces the power consumption by restraining the circuit from being needlessly operated in the period of time when the data in a link-down state does not flow or when the transmission/reception data in a link-up state does not exist. In operations of a reception clock control part and a transmission clock control part, a processing time is very short because complicated processing is not included, such as the cutoff of a power source, information saving for state return and clock change. In addition , there is no possibility of deteriorating the performance. <P>COPYRIGHT: (C)2008,JPO&INPIT</p>
申请公布号 JP2007328671(A) 申请公布日期 2007.12.20
申请号 JP20060160673 申请日期 2006.06.09
申请人 ALAXALA NETWORKS CORP 发明人 YAGI TSUKASA
分类号 G06F1/04 主分类号 G06F1/04
代理机构 代理人
主权项
地址