发明名称 Field effect transistors (FETs) with multiple and/or staircase silicide
摘要 A semiconductor structure and method for forming the same. The semiconductor structure comprises a field effect transistor (FET) having a channel region disposed between first and second source/drain (S/D) extension regions which are in turn in direct physical contact with first and second S/D regions, respective. First and second silicide regions are formed such that the first silicide region is in direct physical contact with the first S/D region and the first S/D extension region, whereas the second silicide region is in direct physical contact with the second S/D region and the second S/D extension region. The first silicide region is thinner for regions in contact with first S/D extension region than for regions in contact with the first S/D region. Similarly, the second silicide region is thinner for regions in contact with second S/D extension region than for regions in contact with the second S/D region.
申请公布号 US7309901(B2) 申请公布日期 2007.12.18
申请号 US20050908087 申请日期 2005.04.27
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHEN XIANGDONG;FANG SUNFEI;LUO ZHIJIONG;YANG HAINING;ZHU HUILONG
分类号 H01L21/8232 主分类号 H01L21/8232
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