发明名称 Across-thread out of order instruction dispatch in a multithreaded graphics processor
摘要 Instruction dispatch in a multithreaded microprocessor such as a graphics processor is not constrained by an order among the threads. Instructions are fetched into an instruction buffer that is configured to store an instruction from each of the threads. A dispatch circuit determines which instructions in the buffer are ready to execute and may issue any ready instruction for execution. An instruction from one thread may be issued prior to an instruction from another thread regardless of which instruction was fetched into the buffer first. Once an instruction from a particular thread has issued, the fetch circuit fills the available buffer location with the following instruction from that thread.
申请公布号 US7310722(B2) 申请公布日期 2007.12.18
申请号 US20030742514 申请日期 2003.12.18
申请人 NVIDIA CORPORATION 发明人 MOY SIMON S.;LINDHOLM JOHN ERIK
分类号 G06F9/38;G06F9/46 主分类号 G06F9/38
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