ARRAY CONFIGURATION FOR DRAM MEMORY WITH DOUBLE-GATE FLOATING-BODY FINFET CELLS

摘要

The present invention relates to a DRAM memory that includes a memory-cell array with FinFETs of the double-gate floating-body type. The FinFETs comprise a fin- shaped region that includes a channel region controlled via a front gate and a floating-body region controlled via a back gate. In the DRAM memory device of the invention, FinFET pairs formed by FinFETs neighboring each other in a first array direction are electrically connected back-gate to back-gate via a respective shared back-gate word line that is routed in a second array direction between the FinFETs of a respective FinFET pair to a respective shared back-gate contact, which is arranged outside the FinFET array. Since FinFET pairs neighboring each other in a first array direction are electrically connected back-gate to back- gate through a respective shared back-gate word line, only one back-gate word line is needed per FinFET pair in the first array direction.