发明名称 RECONFIGURABLE INTEGRATED CIRCUITS WITH SCALABLE ARCHITECTURE INCLUDING ONE OR MORE ADDERS
摘要 An integrated circuit (IC) includes a number of function blocks (FB), of which at least one is re-configurable. Each of the FBs may be a reconfigurable function or a non-reconfigurable function or recursively expanded with additional "nested" function blocks. The IC further includes a number of input pins, a number of output pins, an adder, and a number of crossbar devices. The elements, at least at the IC level, are coupled in a manner such that all input signals are provided to the FBs through a first subset of the crossbar devices, all internal signals are routed from one FB to another FB through a second subset of crossbar devices, and all output signals are routed from the FBs to the output pins through a third subset of crossbar devices. To increase routability and speed each of the crossbar device output has a single fanout. Additionally, each of the crossbar devices may provide only one input to each other crossbar device.
申请公布号 US2007279089(A1) 申请公布日期 2007.12.06
申请号 US20070840848 申请日期 2007.08.17
申请人 M2000 SA. 发明人 LEPAPE OLIVIER V.
分类号 H03K19/177 主分类号 H03K19/177
代理机构 代理人
主权项
地址