| 摘要 |
<P>PROBLEM TO BE SOLVED: To reduce the circuit scale of a compensation circuit for reducing the phase noise of a PLL circuit and simplifies control for the compensation circuit, while alleviating non-linear effect resulting from mismatch between a source current injection transistor and a sink current discharge transistor at a charge pump circuit CPC of the PLL circuit, wherein the PLL circuit is a fractional N PLL circuit included in a semiconductor integrated circuit for RF communication as a frequency synthesizer in use for transmitting/receiving operation. <P>SOLUTION: A closed loop band of a fractional N PLL circuit is set to narrow bands of dozens of kHz order, as a frequency synthesizer Frct_Synth in use for transmitting/receiving operation. Alleviation of non-linear effect resulting from mismatch between two transistors at a charge pump circuit CPC can be actualized by a simplest method, injecting dc current Ioffset into a loop filter LFC by offset circuits MN2 and MN3 or discharging Ioffset from the LFC. <P>COPYRIGHT: (C)2008,JPO&INPIT |
