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发明名称
VERFAHREN UND PROZESSOR ZUR PARALLELEN VERARBEITUNG EINER LOGIKEREIGNIS-SIMULATION
摘要
申请公布号
DE60223180(D1)
申请公布日期
2007.12.06
申请号
DE20026023180
申请日期
2002.02.22
申请人
NEOSERA SYSTEMS LTD.
发明人
DALTON, DAMIAN
分类号
G06F17/50
主分类号
G06F17/50
代理机构
代理人
主权项
地址
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