发明名称 Analog circuit and method for multiplying clock frequency
摘要 A signal generating circuit includes a relaxation oscillator operating to alternately generate a first ramp signal that is periodic at a frequency of the relaxation oscillator and a second ramp signal that is periodic at the frequency of the relaxation oscillator and is out of phase with respect to the first ramp signal The first ramp signal is compared to a first reference voltage and the state of a first flip-flop is changed if the first ramp signal exceeds the first reference voltage. The second ramp signal is compared to the first reference voltage and the state of a second flip-flop is changed if the second ramp signal exceeds the first reference voltage. The first flip-flop is reset in response to a first level of the first ramp signal and the second flip-flop is reset in response to a second level of the second ramp signal. A logical ORing function is performed on an output of the first flip-flop and an output of the second flip-flop to produce an output signal having a frequency that is a multiple of the relaxation oscillator frequency.
申请公布号 US2007279137(A1) 申请公布日期 2007.12.06
申请号 US20060448380 申请日期 2006.06.06
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 MOLINA JOHNNIE
分类号 H03K3/26 主分类号 H03K3/26
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