SEMICONDUCTOR MEMORY DEVICE CAPABLE OF CORRECTING A READ LEVEL PROPERLY

摘要

A semiconductor memory device capable of correcting a read level properly is provided to set a proper correction value according to capacitance between floating gates of an adjacent cell. A memory cell array has a plurality of memory cells arranged in a matrix. Each memory cell stores a plurality of bits. A storing part is formed to correct a correction level. A control part is formed to read a threshold level of a second memory cell adjacent to a first memory cell in the memory cell array, and reads the correction level from the storing part according to the threshold level read out from the second memory cell, and reads the threshold level of the first memory cell by adding the read-out correction level to the threshold level of the first memory cell.