| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of reducing a circuit scale. SOLUTION: A plurality of first series circuits each including first and second transistors connected in series are connected in parallel, and a plurality of second series circuits each including third and fourth transistors connected in series are connected in parallel. A plurality of clock signals are input to gates of the plurality of first transistors. The plurality of the clock signals are generated by generating pulses at every predetermined interval so as not to overlap one on the other. A plurality of corresponding clock signals are input to gates of the plurality of the third transistors respectively. A plurality of inverted data yielded by inverting a plurality of data that form input parallel data are input to gates of a plurality of the second transistors. The plurality of data that form the parallel data are input to gates of a plurality of the fourth transistors. COPYRIGHT: (C)2008,JPO&INPIT |
