发明名称 |
Logic arrangement e.g. dynamic random access memory module, operating method, involves arranging portion of logic cells of one of logic blocks between two blocks such that portion of logic cells realizes repeater functionality |
摘要 |
<p>The method involves transmitting a signal between a logic block (1) and another logic block (2), where each logic block is attached to a set logic cells (21-26). A portion to the logic cells of the latter logic block is arranged between two logic blocks in such a manner that the portion of the logic cells fulfills a portion of logic functionality of the latter logic block and realizes repeater functionality for signal transmission between the logic blocks. An independent claim is also included for a logic arrangement with two logic blocks.</p> |
申请公布号 |
DE102006025432(A1) |
申请公布日期 |
2007.12.06 |
申请号 |
DE20061025432 |
申请日期 |
2006.05.31 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
WALLNER, PAUL;DUDHA, CHAITANYA |
分类号 |
H03K19/0175 |
主分类号 |
H03K19/0175 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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