Digital comparator and digital-to-analogue converter

摘要

914,824. Digital number comparators. UNITED AIRCRAFT CORPORATION. Feb. 19, 1959 [Feb. 19, 1958], No. 5749/59. Class 40 (1). In a comparator for comparing two digital binary numbers A and B and for generating an analogue representation of the difference between the numbers the bit signals A and B and complements A1 and B1 thereof are applied to two sets of OR gates controlling switches in the circuits of weighted resistors such that in denominational positions where A exceeds B an equivalent current is caused to flow in one circuit and in positions where B exceeds A an equivalent current is caused to flow in another circuit, these currents being compared to produce an output voltage equivalent to the difference. The comparator is for use in a servomotor system of the kind shown in Fig. 1, control numbers being supplied by the input medium 24, e.g. a digital computer, to a storage register 26 which provides outputs on parallel lines of the bits and complements of the input number. A binary " 1 " is represented by - 20 v. and " 0 " by zero volts. The complementary values are opposite, providing zero volts for a binary " 1 " and - 20 v. for " 0." Another input to the comparator also on parallel lines is from a converter 30 which converts the angular position of the driven device 10 into a binary representation. The difference signal is amplified and used to control a motor 14 which drives either forward or backwards according to the input signal. The system is arranged to drive the motor at a maximum rate when the error or difference between the desired and actual positions exceeds a certain value and, after that point, to cause the motor to run at a speed proportional to the error. The output from the comparator is therefore an analogue representation of the difference for the six lowest bits, the seven other bits being conpared to determine whether the predetermined maximum has been exceeded. The number from the input 24 is termed " A " and that from the converter 30, " B." Both have thirteen digits. The range of difference over which proportional control is excercised is + 32 (A greater than B) to - 32 (A less than B). For differences of greater than Œ 32 a maximum signal is produced. In Fig. 2 a difference of +16 is designated D=+1, the maximum difference would therefore be D=+2 or D= -2. The squares in Fig. 2 are transistor AND gates. Numbers within the squares refer to the denominations of the bits or complements 0-12 applied to the gate and the inputs, and A and a B bit or complement, are indicated. The gates open when two true " 1 " signals are applied or a " 1 " and a complementary " 0 " or two complementary " 0 " signals. The circles are transistor OR gates which pass any signal applied to them. Five lines emerge from the column of gates 5a to 5j corresponding to the " 32 " bit to indicate whether the higher denominations show a difference D of greater than +2, +2, zero - 2 or less than - 2. These outputs are gated with the " 16 " bits in gates 4a to 41 arranged in three groups of four and seven output lines indicate that D> +2, D=+2, D=+1, D=0, D= -1, D= -2, or D > - 2. Conversion to analogue.-These differences and the difference between the lowest 4 digits of the numbers are converted to an analogue representation. For this purpose a biased A.C. voltage is used, derived from the secondary 94 of transformer 96, one end of which is connected to a - 10 v. source. The resulting voltage, which alternates between 0 v. and - 20 v., is applied to the centre tap of the primary 88 of transformer 86, the secondary of which provides the output to control the motor 14. A series of resistors 156, 158, 160, 162 weighted 1, ¢, “, #, are connected between the upper end of the primary 88 and a line 164 each in series with a transistor switching unit 0a, 1a, 2a, 3a which is normally conducting. The switching units are turned off by signals through OR gates 0b, 1b 2b, 3b, the inputs to which represent the complementary A bits (i.e. A1) and corresponding true B bits. The switching units will all be turned off therefore except where A= " 1 " and B= " 0." Current therefore flows in the upper half of primary 88 proportional to the value of denominations where A is greater than B. The lower half of the primary is connected to a similar set of resistors 192, 194, 196 and 198 controlled by switches 0c, 1c, 2c and 3c through gates 0d, 1d, 2d and 3d. These, because the inputs are A and B1, produce a current in the lower half of the primary 88 proportional to the value of the denominations where B is " 1 " and A is "0." Thus if A=1010 (=ten) and B= 0111 (=seven) switch 3a is on and switches 0c and 2c are on. Eight units of current therefore flow in the upper half and five units in the lower half of primary 88, the resultant magnetic flux in the core being the difference, i.e. three, which is the difference between A and B. The line 164 is not connected in circuit unless the total error is in the range +32 to - 32. Transistor switch unit 200 is rendered conductive by D= - 1, D=0 and D= +1 signals because the lowest four digits cannot differ by more than 15 and therefore cannot bring the over-all difference to more than Œ31. If D= - 2 the total error will be less than 32 if for the lowest four digits Ax > Bx. An array of AND gates 0e-0h, 1e-1h 2e-2h and 3e-3h determine whether for these digits, x, A exceeds B or vice versa. Line 228 carrying the D= - 2 signal and line 218 carrying the Ax > Bx signal are applied to switch 202 which opens when both are present to allow the proportional signals to appear on the output winding 92. Similarly D = + 2 and Ax < Bx signals combine to operate switch 204. To the proportional signals are added 16 and 32 units of current where D = Œ1 or Œ2 signals are present. These circuits are independent of the switches 200, 202 and 204. In the upper circuit resistors 102 and 148 weighted 1/32 and 1/16 are switched into circuit by D > +2 or D= + 2 and D= + 1 signals, respectively, and resistors 140 and 155 are similarly switched into the lower circuit when signals D-2 2 or D= -2 and D= -1 are present. The resulting analogue output is therefore proportional within the error range +32 to - 32 but outside that range is fixed at the maximum value equivalent to an error of Œ32. In a modification the output is proportional for movement in one direction (say when A > B) but is constant in the other (when B > A) so that the device 10 overshoots in the other direction. The system may be adapted for binary coded decimal code by using for resistors 102, 140 and 148, 155 resistors weighted 1/20 and 1/10.