发明名称 |
Memory mapping for parallel turbo decoding |
摘要 |
A routing multiplexer system provide p outputs based on a selected permutation of p inputs. Each of a plurality of modules has two inputs, two outputs and a control input and is arranged to supply signals at the two inputs to the two outputs in a direct or transposed order based on a value of a bit at the control input. A first p/2 group of the modules are coupled to the n inputs and a second p/2 group of the modules provide the n outputs. A plurality of control bit tables each contains a plurality of bits in an arrangement based on a respective permutation. The memory is responsive to a selected permutation to supply bits to the respective modules based on respective bit values of a respective control bit table, thereby establishing a selected and programmable permutation of the inputs to the outputs.
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申请公布号 |
US7305593(B2) |
申请公布日期 |
2007.12.04 |
申请号 |
US20030648038 |
申请日期 |
2003.08.26 |
申请人 |
LSI CORPORATION |
发明人 |
ANDREEV ALEXANDER E.;BOLOTOV ANATOLI A.;SCEPANOVIC RANKO |
分类号 |
G06F11/00;H03M13/27;H03M13/29 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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地址 |
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