发明名称 |
Automatic phase lock loop design using geometric programming |
摘要 |
A method is described that involves developing a more detailed description of a phase lock loop system by substituting, into a monomial or posynomial equation that is part of a family of monomial and posynomial expressions that describe functional characteristics of the PLL at the system level, a lower level expression that describes a characteristic of one the PLL's basic building blocks.
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申请公布号 |
US7304544(B2) |
申请公布日期 |
2007.12.04 |
申请号 |
US20040810444 |
申请日期 |
2004.03.26 |
申请人 |
SABIO LABS, INC. |
发明人 |
COLLERAN DAVE;HASSIBI ARASH |
分类号 |
G06F17/50;H03L7/00;H03L7/08;H03L7/089;H03L7/099 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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