发明名称 |
METHOD FOR FABRICATING SELF ASSEMBLED DUMMY PATTERN FOR SEMICONDUCTOR DEVICE BY USING CIRCUITRY LAYOUT |
摘要 |
<p>A method for fabricating a self assembled dummy pattern for semiconductor device by using a circuitry layout is provided to generate automatically a dummy pattern by applying a self shape of a semiconductor device circuit. A design process is performed to design an original circuitry layout(390). An inverse layout forming process is performed to obtain an inverse layout of the original circuitry layout. A reduced layout forming process is performed to obtain a reduced layout of the inverse layout. A layout of a self assembled dummy pattern is obtained from the original circuitry layout by using an outline of the reduced layout and a predetermined line width. The layout of the self assembled dummy pattern is coupled with the original circuitry layout. A coupled layout(590) is transferred onto a semiconductor substrate.</p> |
申请公布号 |
KR100780775(B1) |
申请公布日期 |
2007.11.30 |
申请号 |
KR20060117158 |
申请日期 |
2006.11.24 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
MOON, JAE IN |
分类号 |
H01L21/027;G03F1/36;G03F1/68;G03F1/70;H01L21/82 |
主分类号 |
H01L21/027 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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