发明名称 Parallelization of Video Decoding on Single-Instruction, Multiple-Data Processors
摘要 A method of parallelizing the prediction of H.264 luma blocks is disclosed. The illustrative embodiment, for example, enables the prediction of H.264 luma blocks to be performed in parallel on a single-instruction, multiple-data processor so that any two-and up to all 16 pixels-can be set simultaneously in different execution units. This is very fast and economical. The invention of formulas for enabling the parallelization of the H.264 luma blocks is noteworthy because of the diversity in the structures of the formulas for predicting the various pixels given by the H.264 standard. For example, the standard specifies fundamentally different formulas for some pixels than for others, which makes their parallelization appear impossible.
申请公布号 US2007274398(A1) 申请公布日期 2007.11.29
申请号 US20060419882 申请日期 2006.05.23
申请人 METTA TECHNOLOGY, INC. 发明人 CAULK ROBERT LOUIS
分类号 H04N7/12 主分类号 H04N7/12
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