发明名称 CIRCUIT DEVICE WITH SERIAL TEST INTERFACE AND SERIAL TEST MODE PROCEDURE
摘要 PROBLEM TO BE SOLVED: To provide a circuit device with a serial test interface or a serial test mode procedure. SOLUTION: The circuit device includes a serial test interface (TIF) for controlling a test mode, a freely programmable digital processor (CPU), a housing (G) housing the test interface (TIF) and the processor (CPU), and terminals (C0, C1) for exchanging data and/or signals with external components and external devices. In one terminal (C1), two voltage levels (V2, V3) which are controllable and different from a power supply voltage level (V1) designed to supply an operating voltage to the circuit device, are used to receive a modulated power supply voltage (VDD) and to perform data (d) transfer and/or pulse (T) transfer. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2007312390(A) 申请公布日期 2007.11.29
申请号 JP20070129374 申请日期 2007.05.15
申请人 MICRONAS GMBH 发明人 BIDENBACH REINER;FRANKE JOERG;RITTER JOACHIM;JUNG CHRISTIAN
分类号 H03K19/0175;G01R31/28;H03K19/00 主分类号 H03K19/0175
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