| 摘要 |
The present invention relates to a circuit and method for reducing intermodulation distortion in a non- linear device (10) having a differential output stage. Calibration means are provided for adding a calibration offset voltage to at least one of one output branch of said differential output stage and a bulk terminal of a transistor of one output branch of said differential output stage, to obtain a desired output offset at said differential output stage. Thereby, a certain degree of asymmetry is introduced, so that both output branches of the differential output stage are matched or optimized to improve the IIP2 factor and reduce intermodulation distortions. |
