发明名称 Circuit with asynchronous/synchronous interface
摘要 Data is communicated between an asynchronously operating circuit ( 10 ) and a clocked operating sub-circuit ( 16, 17 ). A data signal is supplied from the asynchronously operating sub-circuit ( 10 ) accompanied by a blocking/non blocking control signal. A request signal from the asynchronously operating sub-circuit ( 10 ) when the data signal and the control signal are being supplied. The data is stored in response to the request at least if the control signal supplied with the data has a first value. The request signal is routed through a path through handshake elements in a handshake circuit ( 20, 30,40 ) that is arranged to generate an acknowledge signal in response to the request signal to the asynchronously operating sub-circuit ( 10 ). The path through the handshake elements dependent on the control signal, so that the acknowledge signal is generated upon storing the data signal that accompanies the request at the output into the storage element when the control signal supplied with the data has the first value, and the acknowledge signal is generated upon detecting a clock cycle of the clocked operating sub-circuit wherein the clocked operating sub-circuit accepts the data that accompanies the request when the control signal has a second value.
申请公布号 US2007277053(A1) 申请公布日期 2007.11.29
申请号 US20050568244 申请日期 2005.04.26
申请人 TIMMERMANS DANIEL 发明人 TIMMERMANS DANIEL
分类号 G06F1/12;G06F13/40 主分类号 G06F1/12
代理机构 代理人
主权项
地址