| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide an asynchronous packet data multiplexing circuit, capable of actualizing functions of multiplexing a variable-length asynchronous packet data having no restriction on packet occurrence intervals input into a plurality of channels, and outputting on a single line, with a small-scale circuit. <P>SOLUTION: In the asynchronous packet data multiplexing circuit, multiplexing and transferring asynchronous packet data input into the plurality of channels, a dual port memory section 50 includes memory areas being one-to-one correspondence with the channels. A read CH selection section 80 grasps the number of data having not been read out on a channel-by-channel basis, among the input data stored in the dual port memory, and outputs a read CH enable signal to the channel having the largest number of data. A memory readout control section 60 reads out data from the memory area specified by the read CH enable signal. <P>COPYRIGHT: (C)2008,JPO&INPIT</p> |
