| 摘要 |
A design method for a semiconductor integrated circuit includes a first step (S 13 ) of grouping pins that configure a same net into a plurality of groups; a second step (S 14 ) of defining sub-trunk wirings mutually connecting the pins that belong to a same group; a third step (S 16 ) of defining a main trunk wiring substantially parallel to the sub-trunk wirings; and a fourth step (S 17 ) of defining a lead-in wiring connecting at least the main trunk wiring and the sub-trunk wirings. Thus, a plurality of pins are grouped, and the groups are mutually connected by the sub-trunk wirings, making it possible to decrease the number of the lead-in wirings. Thereby, even when the number of nets is large relative to the area of a layout region, a probability of occurrence of nets where automatic wiring is impossible can be greatly reduced.
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