发明名称 SIGNAL AMPLIFIER
摘要 <P>PROBLEM TO BE SOLVED: To perform threshold setting control with high precision using an inexpensive standard CMOS. <P>SOLUTION: An offset voltage generator 11 detects the DC level of an input signal and then generates and outputs a positive side offset voltage signal, or generates and outputs a negative side offset voltage signal. A peak detector 21 outputs the positive side offset voltage signal if its level is larger than the maximum level of the input signal, and outputs the maximum level of the input signal as a peak value if the maximum level of the input signal is larger than the positive side offset voltage signal. A bottom detector 22 outputs the negative side offset voltage signal if its level is smaller than the minimum level of the input signal, and outputs the minimum level of the input signal as a bottom value if the minimum level of the input signal is smaller than the negative side offset voltage signal. A voltage divider 23 divides the peak value and the bottom value to generate a threshold level. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2007311865(A) 申请公布日期 2007.11.29
申请号 JP20060136181 申请日期 2006.05.16
申请人 FUJITSU LTD 发明人 IDE SATOSHI
分类号 H03K5/1532;H03F3/45;H03K5/153 主分类号 H03K5/1532
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