发明名称
摘要 An image processing apparatus (400) comprises a SIMD processor (401) which scans an image frame for regions of interest (step 301), for example corresponding to regions having objects or lines of interest. Each region of interest is rescanned to an orthogonal grid. The orthogonal grids are then floorplanned so that they are rearranged into a smaller subset of image lines. The floorplanning consists of mapping a set of rectangles into a compressed frame portion. Optionally, the rectangles can be rotated in order to allow the rectangles to be packed more densely. The SIMD processor (401) then processes the floorplanned image data (step 307). Once the image data has been processed by the SIMD processor, the DSP (405) re-associates the processed data (step 309), using information stored during floorplanning. The image processing apparatus results in a more efficient use of the SIMD processor (401).
申请公布号 JP2007535267(A) 申请公布日期 2007.11.29
申请号 JP20070510220 申请日期 2005.04.26
申请人 发明人
分类号 H04N1/387;G06T1/00;H04N7/26 主分类号 H04N1/387
代理机构 代理人
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