| 摘要 |
A PWM drive circuit of the present invention is built with a load driving power MOS transistor Q 5 (Q 6 ), a resistor R 3 (R 5 ) or R 4 (R 6 ), and a capacitance of the MOS transistor Q 5 (Q 6 ). The PWM drive circuit is provided with: a CR circuit that reduces a through rate of a voltage based on a PWM voltage and then feeds the resultant voltage to the gate of the MOS transistor Q 5 (Q 6 ); and a gate voltage control portion 4 ( 5 ) that stops an operation of the CR circuit and pulls down (up) the gate potential of the MOS transistor Q 5 (Q 6 ) to a predetermined value upon detecting during a transition period of a gate voltage of the MOS transistor Q 5 (Q 6 ) that the MOS transistor Q 5 (Q 6 ) is completely switched from off to on. This makes it possible to reduce switching noise and switching loss.
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