发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND TESTING METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To reduce a testing time of a semiconductor integrated circuit. SOLUTION: The semiconductor integrated circuit 1 comprises: a RAM 2, and a control circuit 10 for controlling the retention test of the RAM 2. The control circuit 10 breaks electrical connection between the RAM 2 and other internal circuits 3 during the retention test. Then, after the retention test is completed, the control circuit 10 secures electrical connection between the RAM 2 and an output terminal OUT, and outputs data held by the RAM 2 to the output terminal OUT. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2007305638(A) 申请公布日期 2007.11.22
申请号 JP20060129829 申请日期 2006.05.09
申请人 NEC ELECTRONICS CORP 发明人 KORIYAMA KAZUHIRO
分类号 H01L21/822;G01R31/28;G11C29/56;H01L27/04 主分类号 H01L21/822
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