METHOD AND APPARATUS FOR MEASURING THE DUTY CYCLE OR RELATIVE DUTY CYCLE OF A DIGITAL SIGNAL

摘要

The disclosed methodology and apparatus measures the duty cycle of a clock signal. A variable duty cycle circuit receives a clock signal from a clock signal generator. The variable duty cycle circuit adjusts the duty cycle of the clock signal by an amount dependent 10 on a duty cycle index value that it receives. The variable duty cycle circuit supplies a duty- cycle adjusted clock signal to a divider circuit. The apparatus sweeps the frequency of the clock signal from a starting value up to a maximum frequency above which the divider circuit fails. The apparatus then determines the duty cycle of the duty-cycle adjusted clock signal fro m the maximum frequency. In one embodiment, the disclosed methodology and 15 apparatus measure relative duty cycle information of a clock signal with respect to an input node as the clock signal travels to selected nodes of a clock distribution network on an electronic circuit.