发明名称 DATA ACCESS CIRCUIT, DECODER, INFORMATION REPRODUCING DEVICE, AND ELECTRONIC EQUIPMENT
摘要 <P>PROBLEM TO BE SOLVED: To provide a data access circuit capable of speeding up access to data stored in a memory with a simple configuration, and to provide a decoder, an information reproducing device, and electronic equipment thereof. <P>SOLUTION: A data access circuit 10 includes: an M-bit buffer (M&ge;n+m, M: a positive integer) for storing data read from the memory; and a pointer management section for managing the pointers of the M-bit buffer. When there is a read request from an external module and the remaining number of data stored in the M-bit buffer is smaller than n bits, control for replenishing data from the memory to the M-bit buffer is made, and the pointer is updated so that the remaining number of data becomes larger by m bits. When there is a read request and data stored in the M-bit buffer are not less than n bits, control for outputting from the M-bit buffer to the external module is made, and the pointer is updated so that the remaining number of data becomes smaller by n bits. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2007304797(A) 申请公布日期 2007.11.22
申请号 JP20060131647 申请日期 2006.05.10
申请人 SEIKO EPSON CORP 发明人 TAKEDA KOHEI;ISHIDA YOSHINOBU;HORIUCHI HIROYUKI
分类号 G06F12/00;G06F12/02;G06F12/04;H03M7/40;H04N5/937;H04N7/173;H04N19/00;H04N19/102;H04N19/152;H04N19/196;H04N19/423;H04N19/44;H04N19/625;H04N19/70;H04N19/91;H04N21/433 主分类号 G06F12/00
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