| 摘要 |
PROBLEM TO BE SOLVED: To shorten test time of semiconductor integrated circuits in which voltage regulator are built. SOLUTION: In the case of halting the operation of a voltage regulator 3 and supplying a power supply voltage VT for test for a second logic circuit block 2, an overall LSI is initialized by a reset signal RST, then a register 4 is set by an input signal IO via a first logic circuit block 1, and the voltage regulator 3 is halted by a power-down signal PWD. After this, a power supply voltage VT is supplied for the second logic circuit block 2 to perform test. When continuously performing a plurality of test items, a reset signal TRST is supplied for a test reset terminal T6 for each item, with the initialization of the register 4 terminated, the first and second logic circuit blocks 1 and 2 are initialized. Since the need for the operations of halting the power supply voltage VT, halting the voltage regulator 3, and supplying the power supply voltage VT at each reset is thereby eliminated, test time is shortened in comparison with the case of using a reset signal RST. COPYRIGHT: (C)2008,JPO&INPIT
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