发明名称 DESIGN SYSTEM AND DESIGN METHOD
摘要 PROBLEM TO BE SOLVED: To obtain a layout result to which an optimum algorithm is applied at each phase of automatic arrangement and wiring design in the layout creation process of a semiconductor integrated circuit. SOLUTION: A design system executes the arrangement/wiring design of a semiconductor integrated circuit by dividing it into a plurality of phases. The design system comprises: an arrangement/wiring processing section for executing at least one of the plurality of phases of arrangement/wiring design by applying a plurality of algorithms; a storage means for storing an intermediate file for indicating an intermediate state executed by applying each of the plurality of algorithms; and a display section for displaying the intermediate state shown in the intermediate file stored in the storage means. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2007304772(A) 申请公布日期 2007.11.22
申请号 JP20060131312 申请日期 2006.05.10
申请人 KAWASAKI MICROELECTRONICS KK 发明人 MIHARA NOBUKAZU
分类号 G06F17/50;H01L21/82 主分类号 G06F17/50
代理机构 代理人
主权项
地址