发明名称 RELATIVE FLOORPLANNING FOR IMPROVED INTEGRATED CIRCUIT DESIGN
摘要 <p>A method for designing integrated circuits includes receiving a floorplan design associated with an integrated circuit. A relative floorplanning constraint is extracted from the floorplan design. The floorplan of the integrated circuit is updated in response to the relative floorplanning constraint. Another method for designing integrated circuits includes receiving a floorplan design associated with an integrated circuit. A set of relative floorplanning constraint is received from the floorplan design. A relative floorplanning constraint is pushed down from the set of relative floorplanning constraints into a partition associated with the floorplan of the integrated circuit. The floorplan is updated in response to the set of relative floorplanning constraints.</p>
申请公布号 WO2007134318(A2) 申请公布日期 2007.11.22
申请号 WO2007US68960 申请日期 2007.05.15
申请人 MAGMA DESIGN AUTOMATION, INC.;ESBENSEN, HENRIK;CARPENTER, ROGER;VAN EIJK, CORNELIS 发明人 ESBENSEN, HENRIK;CARPENTER, ROGER;VAN EIJK, CORNELIS
分类号 C12Q1/68 主分类号 C12Q1/68
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