发明名称 SEMICONDUCTOR DEVICE, AND METHOD FOR GENERATING WIRING AUXILIARY PATTERN
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device where a via distribution is uniformly obtained on the surface of a substrate, and to provide a method for generating a wiring auxiliary pattern. SOLUTION: A semiconductor integrated circuit includes first wiring and second wiring arranged in the upper layer of the first wiring. A region with low via pattern density is extracted based on wiring layout information in the semiconductor integrated circuit. Then, a dummy via pattern connected to the first or second wiring is arranged in the peripheral region of the via pattern in the selected region. Consequently, a dummy via is arranged even in a place with congested wiring. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2007305713(A) 申请公布日期 2007.11.22
申请号 JP20060131224 申请日期 2006.05.10
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SHIBATA HIDENORI
分类号 H01L21/3205;H01L21/82;H01L21/822;H01L23/52;H01L27/04 主分类号 H01L21/3205
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