发明名称 Conversion Circuit for Pulse Code Modulated and Direct Stream Digital Data
摘要 A Digital to Analog (D/A) convening Integrated Circuit (IC) 33 is able to create left and right channel analog audio data from Pulse Code Modulated (PCM) or Direct Stream Digital (DSD) data due to a conversion circuit 32 (fig. 3) which selectively outputs either format. For DSD Data. conversion circuit 32 receives channel clock LRCK, bit clock BCK and master clock MCK (fig. 8) and outputs separate right and left channel data, DSD_R and DSD_L, arranged alternately word by word via shift registers 321-322 (fig. 3). PCM data bypasses conversion at 32, entering the IC directly from interface (I/F) 31 along with LRCK, BCK and MCK (figs. 2 and 5). This avoids the need for expensive Large Scale Integrated (LSI) circuits to perform D/A conversion of DSD data.
申请公布号 GB2438272(A) 申请公布日期 2007.11.21
申请号 GB20070001179 申请日期 2007.01.22
申请人 SONY CORPORATION 发明人 MICHIAKI YONEDA
分类号 G11B20/10;G06F7/76;H03M7/00;H04B14/04 主分类号 G11B20/10
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