发明名称 Method and apparatus for decimal number multiplication using hardware for binary number operations
摘要 According to embodiments of the subject matter disclosed in this application, decimal floating-point multiplications and/or decimal fixed-point multiplications may be implemented using existing hardware for binary number operations. The implementation can be carried out in software, in hardware, or in a combination of software and hardware. Pre-calculated constants that are approximations to negative powers of 10 and stored in binary format may be used for rounding multiplication results to a designated precision by multiplying the results with a pre-calculated constant. Additionally, several parts of a decimal multiplication may be carried out in parallel. Furthermore, a simple comparison with a constant instead of an expensive remainder calculation may be used for midpoint detection and exactness determination.
申请公布号 EP1857925(A2) 申请公布日期 2007.11.21
申请号 EP20070251933 申请日期 2007.05.10
申请人 INTEL CORPORATION 发明人 CORNEA-HASEGAN, MARIUS
分类号 G06F7/491 主分类号 G06F7/491
代理机构 代理人
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