发明名称 Method and apparatus for improved reliability and reduced power in a processor by automatic voltage control during processor idle states
摘要 A method and apparatus automatically transferring to an enhanced low-power state of a processor is disclosed. In one embodiment, either all or a portion of a processor core clock distribution grid may be powered down in these enhanced low-power states. In one embodiment, the processor may operate in a reduced power supply voltage and operate at a reduced frequency during these enhanced low-power states. In one embodiment, a portion of the clock distribution grid may be left on to support snoop operations at a reduced frequency.
申请公布号 US7299370(B2) 申请公布日期 2007.11.20
申请号 US20030459011 申请日期 2003.06.10
申请人 INTEL CORPORATION 发明人 GEORGE VARGHESE;NEWMAN MARK A.;JAHAGIRDAR SANJEEV;SODHI INDER M.;KHONDKER TANJEER R.;NAZARETH MATHEW B.;CONRAD JOHN B.
分类号 G01R23/02;G06F1/32 主分类号 G01R23/02
代理机构 代理人
主权项
地址