发明名称 Error correction circuit
摘要 An error correction circuit includes a selected-bit reverse circuit, an ECC circuit, a checkbit generation circuit, an ECC data register, a bit-comparing circuit, and an address memory unit. The selected-bit reverse circuit includes memory data and check data from the memory unit. The ECC circuit corrects a one-bit error. The checkbit generation circuit generates checkbits. The ECC data register stores the corrected data and the checkdata. The bit-comparing circuit compares each bit between the output data A from the selected-bit reverse circuit and the output data A' from the ECC data register. The address memory unit stores an address corresponding to the memory data when the bit-comparing circuit detects a discrepancy among the data A and the data A'. The error data memory unit writes the discrepancy information at the bit-location. The data OR circuit generates the first signal.
申请公布号 US7299400(B2) 申请公布日期 2007.11.20
申请号 US20050057150 申请日期 2005.02.15
申请人 OKI ELECTRIC INDUSTRY CO., LTD. 发明人 YUSA ATSUSHI
分类号 G06F12/16;G11C29/00;G11C29/42;H03M13/00;H03M13/37 主分类号 G06F12/16
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