发明名称 Timing analysis apparatus, systems, and methods
摘要 An apparatus and a system, as well as a method and article, may operate to include receiving initial static timing environment data associated with a circuit at a graphical user interface, and generating a data file including a plural of all possible sources of a generated clock included in the circuit.
申请公布号 US7299433(B2) 申请公布日期 2007.11.20
申请号 US20030458537 申请日期 2003.06.09
申请人 INTEL CORPORATION 发明人 CLEMENT MANUEL S.;TRIVEDI VIVEK;MOHIUDDIN SADIQ
分类号 G06F17/50;G06F9/45 主分类号 G06F17/50
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