发明名称 |
Semiconductor integrated circuit device and method of design of semiconductor integrated circuit device |
摘要 |
A semiconductor integrated circuit device having a test clock generating circuit enabling a high performance test operation and a method of designing a semiconductor integrated circuit device enabling setting of high precision timing margins is disclosed. A test clock generating circuit having a register sequential circuit and a clock output control circuit is provided between a pulse generating circuit and a logic circuit. When a test operation is active, transfer of a clock pulse generated in the pulse generating circuit to the logic circuit is stopped and a test clock pulse operating the logic circuit is outputted using a pulse signal generated in the pulse generating circuit by controlling a clock transfer control circuit with the sequential circuit depending on setting information of a register. The test clock generating circuit is comprised using a logic design tool utilizing a computer in order to test logic circuit functions and timing margins.
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申请公布号 |
US7299392(B2) |
申请公布日期 |
2007.11.20 |
申请号 |
US20020291599 |
申请日期 |
2002.11.12 |
申请人 |
HITACHI, LTD. |
发明人 |
DATE HISAKAZU;IKEYA TOYOHITO;KAWASHIMA MASATOSHI |
分类号 |
G01R31/28;G01R31/3183;G01R31/319;H01L21/82;H01L21/822;H01L27/04 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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