| 摘要 |
<p>An integrated circuit device (for example, logic or discrete memory device) comprising a memory cell including a punch-through mode transistor, wherein the transistor includes a source region, a drain region, a gate, a gate insulator, and a body region having a storage node which is located, at least in part, immediately beneath the gate insulator. The memory cell includes at least two data states which are representative of an amount of charge in the storage node in the body region. First circuitry is coupled to the punch-through mode transistor of the memory cell to: (1) generate first and second sets of write control signals, and (2a) apply the first set of write control signals to the transistor to write a first data state in the memory cell and (2b) apply the second set of write control signals to the transistor to write a second data state in the memory cell. In response to the first set of write control signals, the punch- through mode transistor provides at least the first charge in the body region via impact ionization. The transistor may be disposed on a bulk-type substrate or SOI-type substrate.</p> |
