摘要 |
Method and apparatus for performing two independent sum-of-absolute-difference (SAD) operations when receiving a single instruction ( 505, 705 ) is provided. The two operations may be performed in parallel. The operations process values stored in two source registers ( 405, 410 ) and the results are stored to a destination register ( 425 ). The source and destination registers each have two independently accessible sections, whereby a first SAD operation ( 401 ) can access a first section while a second independent SAD operation ( 402 ) can simultaneously access a second section of the register. The first SAD operation is performed on values in a first section of the source registers, the result being stored to a first section of the destination register. The second SAD operation is performed on values in a second section of the source registers, the result being stored to a second section of the destination register. The values may comprise pixel values.
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